Standard RT-XSG - eHS Without I/O

Abstract

This model implements a basic FPGA implementation of the eHS solver, and is used to generate the firmware of the standard RT-LAB - eHS example models. The eHS on FPGA solver being circuit independent, this example model is not associated to any specific circuit topology, as long as the standard eHS requirements in terms of maximum number of elements are met. The generated firmware can be used directly with the RT-LAB example models, or the model can be adapted by the developer to connect the eHS solver to other FPGA-based computation elements directly, without passing through the CPU-based model. The developer should use extra care not to remove critical elements from the eHS feature when adapting this standard design into a custom configuration. [This model implements a basic FPGA implementation of the eHS solver, and is used to generate the firmware of the standard RT-LAB - eHS example models. The eHS on FPGA solver being circuit independent, this example model is not associated to any specific circuit topology, as long as the standard eHS requirements in terms of maximum number of elements are met. The generated firmware can be used directly with the RT-LAB example models, or the model can be adapted by the developer to connect the eHS solver to other FPGA-based computation elements directly, without passing through the CPU-based model. The developer should use extra care not to remove critical elements from the eHS feature when adapting this standard design into a custom configuration. [This model implements a basic FPGA implementation of the eHS solver, and is used to generate the firmware of the standard RT-LAB - eHS example models. The eHS on FPGA solver being circuit independent, this example model is not associated to any specific circuit topology, as long as the standard eHS requirements in terms of maximum number of elements are met. The generated firmware can be used directly with the RT-LAB example models, or the model can be adapted by the developer to connect the eHS solver to other FPGA-based computation elements directly, without passing through the CPU-based model. The developer should use extra care not to remove critical elements from the eHS feature when adapting this standard design into a custom configuration. [Solver: eHS; Toolbox: RT-XSG; Third Party Software: Xilinx System Generator] & [FPGA and I/O Board: K7 325 MMPK7, K7 410 MMPK7, K7 325 TE0741, ML605_2 ]